The present invention relates in general to semiconductor interconnections and, more particularly, to shaped inter-substrate plug and receptacle interconnects.
Integrated circuits (ICs) typically use multiple layers of metal within the chip to perform interconnections between active elements. The metal interconnects route signals around the chip as necessary to achieve the intended function. As integrated circuits become smaller and more dense, the lines interconnecting active elements become narrower and more closely packed together. Therefore, the resistance of each interconnect line increases as cross-sectional area decreases. Likewise, the capacitance between adjacent interconnect lines increases with less spacing. Thus, increasing densities spawn slower operating speeds because of the interconnect requirements. Another problem occurs during electro-migration where high temperatures and high current density create voids in the metal and eventually open-circuits the interconnect lines.
Prior art solutions have considered low dielectric insulators and higher conductivity metals for higher density ICs. Nonetheless, VLSI designs continue to struggle with speed vs. density trade-offs. With each additional metal layer to handle the large number of functioning active elements, more masking steps are necessary which adds expense and complexity to the IC.
One known IC technique involves making use of flip-chip designs for multi-chip modules. The IC is fabricated with solder bumps on one side. The ICs are placed on a printed circuit board and the solder bumps are reflowed to make permanent electrical contact between the IC and the printed circuit board. The solder bumps on flip-chip ICs usually on the order of 10 mils (0.0254 millimeters) in diameter with 10 mil spacings. The solder bumps take the place of conventional wire bonding in routing input and output signals to and from the IC. However, the solder bumps do not replace the interconnect layers within the IC. Therefore, prior art flip-chips have not solved the problem of maintaining high speed operation with increasing IC density. Moreover, once the flip-chips are joined together it becomes impractical to separate the union.
Hence, a need exists to interconnect high density ICs while maintaining high operating performance and yet be able to readily separate and rejoin the interconnects.